Commonly portable products, such as cell phones, laptop computers, personal data assistants (PDAs) or the like, require the use of a processor executing programs, such as, communication and multimedia programs. The processing system for such products includes a processor and memory complex for storing instructions and data. For example, the instructions and data may be stored in a hierarchical memory consisting of multi-levels of caches, including, for example, an instruction cache, a data cache, and a system memory. The use of a separate instruction cache and a separate data cache is known as a Harvard architecture. Since the Harvard architecture isolates the instruction cache from the data cache, problems may arise when instructions are stored in the data cache.
In general system processing with a Harvard architecture, there are situations which arise in which instructions may be stored in the data cache. For example, if a program is encrypted or in a compressed form, it must be decrypted/decompressed prior to enabling the program to run. The decryption/decompression process treats the encrypted/compressed program as data in order to process it and stores the decrypted/decompressed instructions as data in a data cache, for example, a level 1 data cache, on its way to system memory. The generation of instructions from Java byte codes is another situation in which instructions are initially treated as data that are stored using the data path, including the data cache, to the system memory. The initial state of a program in which program instructions are being treated as data creates a coherence problem within the memory hierarchy, since at least some parts of a program may reside in the data cache prior to execution of the program.
In order to resolve the coherence problem, a software approach is typically taken wherein the program or program segments in the data cache are moved to system memory under program control, the instruction cache is typically invalidated to clean the cache of any old program segments, and the instructions comprising the program are then fetched from the system memory. The movement of the instructions from the data cache to system memory and the fetching of the instructions from system memory prior to execution may take several cycles, reducing the processor's performance due to processing time overhead that must occur to access instructions initially residing on the data cache prior to the program running on the processor.